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au.\*:("LEI, Tan-Fu")

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Results 1 to 25 of 44

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Fullerene-incorporation for enhancing the electron beam resist performance for contact hole patterning and fillingYOU, Hsin-Chiang; KO, Fu-Hsiang; LEI, Tan-Fu et al.Thin solid films. 2006, Vol 500, Num 1-2, pp 214-218, issn 0040-6090, 5 p.Article

Suppression of the floating-body effect in poly-Si thin-film transistors with self-aligned Schottky barrier source and ohmic body contact structureKUO, Po-Yi; CHAO, Tien-Sheng SR; LEI, Tan-Fu et al.IEEE electron device letters. 2004, Vol 25, Num 9, pp 634-636, issn 0741-3106, 3 p.Article

High-performance p-channel LTPS-TFT using HfO2 gate dielectric and nitrogen ion implantationMA, Ming-Wen; CHIANG, Tsung-Yu; CHAO, Tien-Sheng et al.Semiconductor science and technology. 2009, Vol 24, Num 7, issn 0268-1242, 072001.1-072001.4Article

H2 and NH3 plasma passivation on poly-Si TFTs with bottom-sub-gate induced electrical junctionsYU, Cheng-Ming; LIN, Horng-Chih; HUANG, Tiao-Yuan et al.Journal of the Electrochemical Society. 2003, Vol 150, Num 12, pp G843-G848, issn 0013-4651Article

Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor DepositionKUO, Po-Yi; CHAO, Tien-Sheng; HUANG, Jyun-Siang et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 234-236, issn 0741-3106, 3 p.Article

Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization TechnologyKUO, Po-Yi; CHAO, Tien-Sheng; LAI, Jiou-Teng et al.IEEE electron device letters. 2009, Vol 30, Num 3, pp 237-239, issn 0741-3106, 3 p.Article

Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratioKUO, Po-Yi; CHAO, Tien-Sheng; HSIEH, Pei-Shan et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 5, pp 1171-1176, issn 0018-9383, 6 p.Article

Improvements in both thermal stability of Ni-silicide and electrical reliability of gate oxides using a stacked polysilicon gate structureJAM WEM LEE; LIN, Shen-Xiang; LEI, Tan-Fu et al.Journal of the Electrochemical Society. 2001, Vol 148, Num 9, pp G530-G533, issn 0013-4651Article

High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structureKUO, Po-Yi; CHAO, Tien-Sheng; WANG, Ren-Jie et al.IEEE electron device letters. 2006, Vol 27, Num 4, pp 258-261, issn 0741-3106, 4 p.Article

A novel process-compatible fluorination technique with electrical characteristic improvements of poly-Si TFTsWANG, Shen-De; LO, Wei-Hsiang; CHANG, Tzu-Yun et al.IEEE electron device letters. 2005, Vol 26, Num 6, pp 372-374, issn 0741-3106, 3 p.Article

Characteristics of vertical thermal/PECVD polysilicon oxides formed on the sidewall of polysilicon filmsLEE, M. Z; CHANG, Y. A; LEE, Chung-Len et al.Journal of the Electrochemical Society. 2003, Vol 150, Num 1, pp G28-G32, issn 0013-4651Article

Hafnium silicate nanocrystal memory using sol-gel-spin-coating methodYOU, Hsin-Chiang; HSU, Tze-Hsiang; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 8, pp 644-646, issn 0741-3106, 3 p.Article

The impact of deep Ni salicidation and NH3 plasma treatment on nano-SOI FinFETsYOU, Hsin-Chiang; KUO, Po-Yi; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 10, pp 799-801, issn 0741-3106, 3 p.Article

Impacts of N2 and NH3 Plasma Surface Treatments on High-Performance LTPS-TFT With High-κ Gate DielectricMA, Ming-Wen; CHAO, Tien-Sheng; CHIANG, Tsung-Yu et al.IEEE electron device letters. 2008, Vol 29, Num 11, pp 1236-1238, issn 0741-3106, 3 p.Article

Impact of channel dangling bonds on reliability characteristics of flash memory on poly-si thin filmsLIN, Yu-Hsien; CHIEN, Chao-Hsin; CHOU, Tung-Huan et al.IEEE electron device letters. 2007, Vol 28, Num 4, pp 267-269, issn 0741-3106, 3 p.Article

Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicateLIN, Yu-Hsien; CHIEN, Chao-Hsin; CHOU, Tung-Huan et al.I.E.E.E. transactions on electron devices. 2007, Vol 54, Num 3, pp 531-536, issn 0018-9383, 6 p.Article

Resist nano-modification technology for enhancing the lithography and etching performanceYOU, Hsin-Chiang; KO, Fu-Hsiang; LEI, Tan-Fu et al.Microelectronic engineering. 2005, Vol 78-79, pp 521-527, issn 0167-9317, 7 p.Conference Paper

Channel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film TransistorsCHENG-YU MA, William; CHIANG, Tsung-Yu; YEH, Chi-Ruei et al.I.E.E.E. transactions on electron devices. 2011, Vol 58, Num 4, pp 1268-1272, issn 0018-9383, 5 p.Article

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With TaN/HfO2 Gate Stack StructureMA, Ming-Wen; CHAO, Tien-Sheng; SU, Chun-Jung et al.IEEE electron device letters. 2008, Vol 29, Num 6, pp 592-594, issn 0741-3106, 3 p.Article

SONOS-type flash memory using an HfO2 as a charge trapping layer deposited by the sol-gel spin-coating methodYOU, Hsin-Chiang; HSU, Tze-Hsiang; KO, Fu-Hsiang et al.IEEE electron device letters. 2006, Vol 27, Num 8, pp 653-655, issn 0741-3106, 3 p.Article

Novel program versus disturb window characterization for split-gate flash cellSUNG, Hung-Cheng; LEI, Tan Fu; HSU, Te-Hsun et al.IEEE electron device letters. 2005, Vol 26, Num 3, pp 194-196, issn 0741-3106, 3 p.Article

Fabrication of sub-60-nm contact holes in silicon dioxide layersKO, Fu-Hsiang; YOU, Hsin-Chiang; CHU, Tieh-Chi et al.Microelectronic engineering. 2004, Vol 73-74, pp 323-329, issn 0167-9317, 7 p.Conference Paper

Reversible transition of resistive switching induced by oxygen-vacancy and metal filaments in HfO2LUO, Wun-Cheng; HOU, Tuo-Hung; LIN, Kuan-Liang et al.Solid-state electronics. 2013, Vol 89, pp 167-170, issn 0038-1101, 4 p.Article

High-Performance Nanowire TFTs With Metal-Induced Lateral Crystallized Poly-Si ChannelsCHANG, Chia-Wen; CHEN, Szu-Fen; CHANG, Che-Lun et al.IEEE electron device letters. 2008, Vol 29, Num 5, pp 474-476, issn 0741-3106, 3 p.Article

High-Performance Poly-Si TFTs With Pr2O3 Gate DielectricCHANG, Chia-Wen; DENG, Chih-Kang; HUANG, Jiun-Jia et al.IEEE electron device letters. 2008, Vol 29, Num 1, pp 96-98, issn 0741-3106, 3 p.Article

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